Taiwan Region (繁體中文)
產品概觀
The V850E2/Mx4 is a 32-bit single-chip microcontroller that integrates up to two V850E2M 32-bit RISC CPU cores, which were developed by enhancing the performance of the V850E1 CPU and V850E2 CPU. The V850E2/Mx4 includes flash memory, RAM, and various peripheral functions, and is used to perform large-capacity data processing and advanced real-time control.
Pin Count / Memory Size Lineup:
主要特色：
Power supply voltage:
- Internal: 1.1 to 1.3 V
- External: 3.0 to 3.6 V
Maximum operating frequency: 200 MHz ROM: 768 KB to 2 MB flash memory RAM:
- V850E2/MN4
- Single-core products (μPD70F3510, μPD70F3512): 64 KB
- Dual-core products (μPD70F3514, μPD70F3515): 2 x 64 KB
- V850E2/ML4
- Single-core products (μPD70F4021, μPD70F4022): 64 KB
Packages:
- V850E2/MN4: 304-pin plastic FBGA (19 x 19)
- V850E2/ML4: 216-pin plastic LQFP (24 x 24)
Minimum instruction execution time: 5.0 ns (during 200-MHz operation using internal system clock) Instruction set: V850E2M
- Two-way superscalar seven-stage pipeline control
- General-purpose registers: 32 bits x 32 registers
- FPU that conforms to the ANSI/IEEE 754-1985 standards
- Up to two on-chip CPUs
Flash memory:
- V850E2/MN4 single-core products: 1 MB
- V850E2/MN4 dual-core products: 1 MB / 2 MB
- V850E2/ML4: 768 KB / 1 MB
Flash cache:
- V850E2/MN4 single-core products and V850E2/ML4: 16 KB (four-way set associative)
- V850E2/MN4 dual-core products: 16 KB (four-way set associative) x 2
Internal RAM:
- V850E2/MN4 single-core products and V850E2/ML4: 64 KB
- V850E2/MN4 dual-core products: 64 KB x 2
H-bus-shared memory: 64 KB Clock generator: Multiplied by 20 using a PLL External bus interface: Two memory controllers
- Primary memory controller (can connect to SRAM/SDRAM)
- Secondary memory controller (can connect to SRAM/SDRAM) *V850E2/ML4 has primary memory controller only
Interrupts and exceptions:
- V850E2/MN4 single-core products: Non-maskable interrupt (1 external source, 1 internal source), maskable interrupts (27 external sources, 179 or 189 internal sources)
- V850E2/MN4 dual-core products: Non-maskable interrupt (1 external source, 2 internal sources), maskable interrupts (28 external sources, 194 internal sources)
- V850E2/ML4: Non-maskable interruption (1 external source, 1 internal source), maskable interrupts (28 external sources, 119 internal sources)
- 16-level programmable priority control
DMA:
- DMA controller: 8 channels (V850E2/ML4) or 16 channels (V850E2/MN4)
- DTS: Up to 128 channels
I/O:
- Input: 7 pins, I/O: 113 pins (V850E2/ML4) or 181 pins (V850E2/MN4)
Timers:
- 16-bit timer array: 16 channels x two units (V850E2/ML4) or 16 channels four units (V850E2/MN4)
- 32-bit timer array: 4 channels x one unit
- 16-bit encoder timer: 2 channels
- OS timer: One channel (V850E2/MN4 single-core products and V850E2/ML4) or two channels (V850E2/MN4 dual-core products)
- Watchdog timer: One channel (V850E2/MN4 single-core products and V850E2/ML4) or two channels (V850E2/MN4 dual-core product)
Serial interfaces:
- Asynchronous serial interface (UART): 2 channels (V850E2/ML4) or 6 channels (V850E2/MN4)
- Clock synchronous serial interface (CSI): 2 channels (V850E2/ML4) or 6 channels (V850E2/MN4)
- Asynchronous serial interface (UART) (FIFO): 2 channels (V850E2/ML4) or 4 channels (V850E2/MN4)
- Clock synchronous serial interface (CSI) (FIFO): 2 channels (V850E2/ML4) or 4 channels (V850E2/MN4)
- I2C: 2 channels (V850E2/ML4) or 6 channels (V850E2/MN4)
- CAN: 1 channel (V850E2/ML4) or 2 channel (V850E2/MN4: μPD70F3512, μPD70F3514, μPD70F3515)
- USB function controller: 1 channel
- USB host controller: 1 channel
- Ethernet controller: 1 channel (V850E2/ML4 and V850E2-/MN4: μPD70F3512, μPD70F3514, μPD70F3515)
A/D converter:
- 10-bit resolution A/D converter: 12 channels (The resolution is 12 bits when using a 5.0 V A/D converter power supply.)
CMOS structure: Completely static circuit
主要應用：
- Industrial equipment (factory automation, etc.), general high-performance high-function control devices
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