The SH7619 is the first Renesas microprocessor to offer an on-chip IEEE802.3 *2 compliant Media Access Controller (MAC*3) and a PHY transceiver, previously connected externally, in a single chip. These features simplify development of a 10/100 Mbps (megabit per second) Ethernet LAN connection function, enabling a reduction in the number of component parts. The SH2 CPU core has a maximum operating frequency of 125 MHz, enabling high-speed execution of TCP/IP and similar protocol processing, and the implementation of high-performance systems.
- High-performance single-chip RISC with SH-2 core
- 163 MIPS 125 MHz
- Built-in 32-bit multiplier
- Mixed instructions/data cache (16kB)- 4-way set associative type
- Built-in large-capacity memory
- SH7619 (RAM/16KB)
- Various peripheral functions
- Ethernet controller × 1 channel
- Ethernet physical layer transceiver (PHY) × 1 channel
- Dedicated Ethernet controller DMAC × 2 channels
- General-purpose DMA controller × 4 channels
- Host interface function (1 Kbyte × 2 banks)
- Serial communication interface with FIFO (SCIF) × 3 channels
(asynchronous and synchronous serial communication capability)
- Serial IO with FIFO (SIOF) × 1channel
- 16-bit compare match timer (CMT) × 2 channels
- On-chip debugging functions
- Interrupt controller (INTC)
- Watchdog timer (WDT)
- Clock pulse generator (CPG): Built-in multiplication PLL
- I/O ports: 78
- Digital AV products: DVD recorders, flat-screen TVs, audio systems, etc.
- OA products: Printers, copiers, etc.
- Industrial equipment: Factory automation equipment, sequencers, surveillance cameras, etc.